μ½˜ν…μΈ λ‘œ 이동

μ½”μŠ€ κ°œμš”

ν•™μŠ΅ 흐름

M01 PCIe 동기  β†’  M02 3-Layer  β†’  M03 TLP
                              ↓
                          M04 DLLP & FC
                              ↓
                          M05 PHY & LTSSM
                              ↓
                  M06 Config & Enumeration
                              ↓
                   M07 Power / AER / HP
                              ↓
              M08 SR-IOV / ATS / P2P / CXL
                              ↓
              Quick Reference Card (M09)

λͺ¨λ“ˆλ³„ 핡심 μ‚°μΆœλ¬Ό

λͺ¨λ“ˆ μ£Όμš” μ‚°μΆœλ¬Ό
M01 "μ™œ PCIe?" μ„€λͺ…, Gen1~Gen7 ν‘œ
M02 3-Layer μ±…μž„ λ‹€μ΄μ–΄κ·Έλž¨
M03 TLP header field ν‘œ, μ£Όμš” type μΉ΄νƒˆλ‘œκ·Έ
M04 ACK/NAK timeline, FC credit ν‘œ
M05 LTSSM μƒνƒœ 전이도, equalization phase
M06 Type 0/1 header 비ꡐ, BAR sizing 수순
M07 D/L state matrix, AER hierarchy
M08 SR-IOV PF/VF λͺ¨λΈ, CXL.io vs cache vs mem

μ‹œκ°„ κ°€μ΄λ“œ

  • λΉ λ₯΄κ²Œ ν›‘κΈ°: M01-M03 (2-3μ‹œκ°„) + M09 (30λΆ„)
  • DV μ—”μ§€λ‹ˆμ–΄ ꢌμž₯: μ „ λͺ¨λ“ˆ (10-15μ‹œκ°„)
  • HW μ„€κ³„μž: M02-M07 (8-10μ‹œκ°„)
  • SW (driver/firmware): M01, M03, M06-M07 (5-7μ‹œκ°„)