SoC Secure Boot ์ฉ์ด์ง¶
ํต์ฌ ์ฉ์ด ISO 11179 ํ์ ์ ์.
A โ Anti-Rollback / Attestation¶
Anti-Rollback¶
Definition. Image์ ์ด์ ๋ฒ์ ์ผ๋ก downgrade๋ฅผ ์ฐจ๋จํ๋ ๋ฉ์ปค๋์ฆ์ผ๋ก, OTP fuse counter๋ฅผ ํตํด minimum acceptable version์ ๊ฐ์ .
Source. Secure Boot literature.
Related. Version counter, OTP fuse, security patch.
Attestation¶
Definition. Device๊ฐ ์์ ์ boot state๋ฅผ ์ธ๋ถ์ ์ฆ๋ช ํ๋ ๋ฉ์ปค๋์ฆ์ผ๋ก, TPM PCR ๋๋ secure enclave๊ฐ ์๋ช ํ measurement๋ฅผ ์ฌ์ฉ.
Source. TPM 2.0 spec.
Related. Measured Boot, PCR, remote attestation.
B โ BootROM / BL1-3¶
BootROM¶
Definition. SoC์ mask ROM์ผ๋ก ๊ณ ์ ๋ ์ฒซ ์คํ ์ฝ๋๋ก, ๋ณ๊ฒฝ ๋ถ๊ฐ๋ฅํ trust anchor ์ญํ .
Source. SoC architecture.
Related. HW RoT, mask ROM, BL1.
BL1 / BL2 / BL31 / BL33¶
Definition. ARM Trusted Firmware์ boot loader ๋จ๊ณ โ BootROM โ BL1 (trusted boot init) โ BL2 (DRAM init + BL31/33 load) โ BL31 (EL3 secure monitor) โ BL33 (U-Boot/non-secure).
Source. ARM Trusted Firmware.
See also. Module 02
C โ Chain of Trust / Crypto Agility¶
Chain of Trust¶
Definition. ๊ฐ boot ๋จ๊ณ๊ฐ ๋ค์ ๋จ๊ณ์ ์๋ช ์ ๊ฒ์ฆํ ํ์๋ง control์ ๋๊ธฐ๋ ์ ๋ขฐ ์ ํ ํจํด.
Source. Verified Boot architectures.
Related. Verify-then-execute, HW RoT.
See also. Module 02
Crypto Agility¶
Definition. ์ํธ ์๊ณ ๋ฆฌ์ฆ์ ๋ณ๊ฒฝ ๊ฐ๋ฅํ๊ฒ ์ค๊ณํ๋ ์์น์ผ๋ก, RSA โ PQC (Post-Quantum Cryptography) ๊ฐ์ ๋ง์ด๊ทธ๋ ์ด์ ๋๋น.
Source. NIST PQC standardization.
E โ eFuse / ECDSA¶
eFuse¶
Definition. Electrically programmable fuse๋ก, OTP ๋ฉ๋ชจ๋ฆฌ์ ํ ํํ. ํ ๋ฒ blowํ๋ฉด ์๊ตฌ์ ์ผ๋ก 1.
Source. Silicon technology.
Related. OTP, immutable storage.
ECDSA¶
Definition. Elliptic Curve Digital Signature Algorithm. RSA๋ณด๋ค ์์ key/signature ํฌ๊ธฐ๋ก ๋๋ฑ ๋ณด์ ์ ๊ณต.
Source. FIPS 186.
Common curves. P-256, P-384, secp256k1.
F โ Fault Injection¶
Fault Injection (FI)¶
Definition. ์ ์ ๊ธ๋ฆฌ์น, ํด๋ญ ๊ธ๋ฆฌ์น, ๋ ์ด์ , X-ray ๋ฑ์ผ๋ก ์๋์ hardware fault๋ฅผ ์ ๋ฐํด signature ๊ฒ์ฆ์ ์ฐํํ๋ ๊ณต๊ฒฉ ๊ธฐ๋ฒ.
Source. Hardware security research.
Related. Glitch detector, FROST, Glitchy Descriptor attack.
See also. Module 05
H โ HSM / HW RoT¶
HSM (Hardware Security Module)¶
Definition. ์ํธ ํค ์์ฑ/์ ์ฅ/์ฌ์ฉ์ ์์ ํ hardware ์์์๋ง ์ํํ๋ ์ธ๋ถ module๋ก, Production private key ๊ด๋ฆฌ์ ํ์.
Source. FIPS 140-⅔.
HW RoT (Hardware Root of Trust)¶
Definition. Boot ์ ๋ขฐ์ ์ถ๋ฐ์ ์ผ๋ก mask ROM (BootROM) + OTP (ROTPK hash + ๋ณด์ ์ค์ )๋ก ๊ตฌ์ฑ.
Source. Secure Boot literature.
See also. Module 01
M โ Measured Boot¶
Measured Boot¶
Definition. ๊ฐ boot ๋จ๊ณ์ image hash๋ฅผ TPM PCR (Platform Configuration Register)์ ๋์ ํ์ฌ OS๊ฐ boot history๋ฅผ ๊ฒ์ฆํ ์ ์๊ฒ ํ๋ ๊ธฐ๋ฒ.
Source. TPM 2.0 spec.
Related. PCR, attestation, Verified Boot ๋น๊ต.
See also. Module 02
O โ OTP¶
OTP (One-Time Programmable)¶
Definition. 1ํ๋ง ์ฐ๊ธฐ ๊ฐ๋ฅํ ๋นํ๋ฐ์ฑ ๋ฉ๋ชจ๋ฆฌ๋ก, ROTPK hash + ๋ณด์ ์ค์ + lifecycle state ์ ์ฅ.
Source. Silicon technology.
Related. eFuse, mask ROM, ROTPK.
See also. Module 01
R โ ROTPK / RSA¶
ROTPK (Root of Trust Public Key)¶
Definition. Boot ๊ฒ์ฆ์ ์ต์์ public key๋ก, hash๊ฐ OTP์ ์ ์ฅ๋์ด BootROM์ด ๋น๊ต ๊ฒ์ฆ.
Source. Trusted Firmware spec.
See also. Module 01
RSA¶
Definition. Rivest-Shamir-Adleman ๋น๋์นญ ์ํธ ์๊ณ ๋ฆฌ์ฆ. Boot signature์ RSA-2048/4096 ์ฌ์ฉ.
Source. PKCS #1, RFC 8017.
Related. PKCS#1 v1.5, PSS padding.
S โ SHA / Side-Channel¶
SHA-256 / SHA-384¶
Definition. Secure Hash Algorithm 2 family. Boot image hash + signature ๊ณ์ฐ์ ์ฌ์ฉ.
Source. FIPS 180-4.
Side-Channel Attack¶
Definition. Power consumption, EM emission, timing ์ธก์ ์ผ๋ก ํค๋ secret๋ฅผ ์ถ์ถํ๋ ๊ณต๊ฒฉ.
Source. Cryptographic literature.
Related. Constant-time crypto, masking, blinding.
See also. Module 05
V โ Verified Boot¶
Verified Boot¶
Definition. Boot ์ signature ๊ฒ์ฆ์ผ๋ก image์ ์ธ์ฆ์ฑ์ ํ์ธํ๊ณ , ์คํจ ์ boot๋ฅผ ์ฐจ๋จํ๋ enforcement ๊ธฐ๋ฒ.
Source. Verified Boot architectures.
Related. Measured Boot ๋น๊ต, anti-rollback.
See also. Module 02
์ถ๊ฐ ์ฝ์ด¶
| ์ฝ์ด | ํ๋ค์ | ์๋ฏธ |
|---|---|---|
| POR | Power-On Reset | ์์คํ ์ฒซ reset |
| TEE | Trusted Execution Environment | secure ์์ญ (TrustZone, SGX ๋ฑ) |
| TPM | Trusted Platform Module | x86 ํ์ค ๋ณด์ chip |
| PCR | Platform Configuration Register | TPM์ hash accumulator |
| PQC | Post-Quantum Cryptography | ์์ ์ปดํจํฐ ๋์ ์ํธ |
| TOCTOU | Time-of-Check to Time-of-Use | verify์ use ์ฌ์ด race ๊ณต๊ฒฉ |
| JTAG | Joint Test Action Group | debug interface (๋ณด์ ์ํ ํฌํจ) |
์ถ๊ฐ ํญ๋ชฉ (Phase 2 ๊ฒ์ ์๋ฃ)¶
BootROM¶
Definition. SoC ์ ์ฒซ ๋ถํ ๋จ๊ณ๋ก ๋์ํ๋ immutable ์ฝ๋ ์์ญ์ผ๋ก, RoT ๊ฒ์ฆ์ ์์์ ์ด ๋๋ฉฐ fuse / OTP ์ ๊ธฐ๋ก๋ ๊ณต๊ฐํค ํด์๋ก ๋ค์ ๋จ๊ณ ์ด๋ฏธ์ง์ ์๋ช ์ ๊ฒ์ฆํ๋ค.
Source. ARM Trusted Firmware-A (BL1); SoC vendor BootROM specs.
Related. RoT, eFuse, OTP, BL1, secure boot.
See also. Module 01
JTAG¶
Definition. IEEE 1149.1 ๊ธฐ๋ฐ boundary-scan ๋๋ฒ๊ทธ ์ธํฐํ์ด์ค๋ก, secure boot ํ๊ฒฝ์์๋ fuse ๋๋ ์ธ์ฆ challenge ๋ก ๋นํ์ฑํ/์ ํํด์ผ ํ๋ ์ ์ฌ์ ๊ณต๊ฒฉ๋ฉด์ด๋ค.
Source. IEEE Std 1149.1; SoC vendor security guides.
Related. Debug Authentication, JTAG locking, attack surface.
See also. Module 01, Module 05
PUF (Physically Unclonable Function)¶
Definition. ์นฉ ์ ์กฐ ๋ณ๋์ฑ์์ ๋น๋กฏ๋๋ ๊ณ ์ ํ ๋ฌผ๋ฆฌ ์๋ต์ ํค ๋๋ ์๋ณ์๋ก ์ถ์ถํ๋ ํ๋ก๋ก, ํ๋ฌธ ํค๋ฅผ ๋ฉ๋ชจ๋ฆฌ์ ์ ์ฅํ์ง ์์๋ chip-unique secret ์ ๋ณต์ํ ์ ์๋ค.
Source. Suh & Devadas, "Physical Unclonable Functions for Device Authentication", DAC 2007; SoC vendor security IP.
Related. HUK, eFuse, key provisioning.
See also. Module 01
TOCTOU (Time-of-Check-to-Time-of-Use)¶
Definition. ๊ฒ์ฆ(Time of Check)๊ณผ ์ฌ์ฉ(Time of Use) ์ฌ์ด์ ๊ณต๊ฒฉ์๊ฐ ๋์์ ๋ณ๊ฒฝํด ๊ฒ์ฆ ๊ฒฐ๊ณผ๋ฅผ ๋ฌด๋ ฅํํ๋ ์ทจ์ฝ์ ํด๋์ค.
Source. McPhee, "Operating System Integrity in OS/VS2", IBM Systems Journal 1974.
Related. Race condition, double-fetch, secure copy-then-verify.
See also. Module 05
EL1 (Exception Level 1)¶
Definition. ARMv8 / ARMv9 ์ 4-level ์์ธ ๋ชจ๋ธ ์ค OS ์ปค๋์ด ๋์ํ๋ ๋ ๋ฒจ๋ก, Normal World ์์ Linux/RTOS ๊ฐ, Secure World ์์ Trusted OS ๊ฐ ์์นํ๋ค.
Source. ARM ARM (Architecture Reference Manual) โ Exception Levels.
Related. EL0, EL2, EL3, TrustZone, S-EL1.
See also. Module 02
EL3 (Exception Level 3)¶
Definition. ARMv8/v9 ์ต์์ ์์ธ ๋ ๋ฒจ๋ก, Secure Monitor (TF-A ์ BL31) ๊ฐ ๋์ํ๋ฉฐ Normal World โ Secure World ์ ํ์ ์ค์ฌํ๋ค.
Source. ARM ARM โ Exception Levels; ARM Trusted Firmware-A.
Related. Secure Monitor, BL31, SMC, TrustZone.
See also. Module 02
DSA (Digital Signature Algorithm)¶
Definition. NIST FIPS 186 ์ ์ ์๋ ์ด์ฐ๋์ ๊ธฐ๋ฐ ์๋ช ์๊ณ ๋ฆฌ์ฆ ๊ตฐ์ ์ด์นญ์ผ๋ก, ๋ณธ ๊ฐ์์์๋ RSA / ECDSA / ML-DSA(PQC) ์ ์์ ์นดํ ๊ณ ๋ฆฌ๋ก ์ฌ์ฉํ๋ค.
Source. NIST FIPS 186-5 โ Digital Signature Standard.
Related. RSA, ECDSA, ML-DSA, signing, verification.
See also. Module 03
PQC (Post-Quantum Cryptography)¶
Definition. ์์ ์ปดํจํ ๊ณต๊ฒฉ์ ๊ฒฌ๋๋๋ก ์ค๊ณ๋ ๊ณต๊ฐํค ์๊ณ ๋ฆฌ์ฆ ๊ตฐ์ผ๋ก, NIST ํ์คํ์์๋ ML-KEM(ํค ๊ตํ), ML-DSA(์๋ช ) ๊ฐ ์ฑํ๋์๋ค.
Source. NIST PQC Standardization; FIPS 203, 204, 205.
Related. ML-DSA, ML-KEM, SLH-DSA, lattice-based crypto.
See also. Module 03
RPMB (Replay Protected Memory Block)¶
Definition. eMMC / UFS ๋๋ฐ์ด์ค์ ์ธ์ฆ ํค ๊ธฐ๋ฐ ์์ญ์ผ๋ก, host ์ ๊ณต์ secret ์ผ๋ก read/write ์ธ์ฆ์ ์ํํด rollback / replay ๊ณต๊ฒฉ์ ๋ง๋๋ค.
Source. JEDEC eMMC 5.1 (JESD84-B51); UFS Spec โ RPMB.
Related. Secure storage, anti-rollback, monotonic counter.
See also. Module 04
FIP (Firmware Image Package)¶
Definition. ARM TF-A ๊ฐ ์ฌ์ฉํ๋ ๋จ์ผ binary container ํฌ๋งท์ผ๋ก, BL2 / BL31 / BL33 ๋ฑ ๋ถํ ๋จ๊ณ๋ณ ์ด๋ฏธ์ง๋ฅผ ๋ฌถ๊ณ ๊ฐ๊ฐ์ ๋ฌด๊ฒฐ์ฑ ์ธ์ฆ์๋ฅผ ํฌํจํ๋ค.
Source. ARM Trusted Firmware-A documentation, Firmware Design โ FIP.
Related. TF-A, BL2, BL31, BL33, certificate.
See also. Module 04
PCR (Platform Configuration Register)¶
Definition. TPM ๋๋ ๋๋ฑํ ์ธก์ ์ ์ฅ์ ๋ด์ ๋์ ํด์ ๋ ์ง์คํฐ๋ก, ๋ถํ ๋จ๊ณ๋ง๋ค ์ธก์ ๊ฐ์ extend ํ์ฌ Attestation / Sealed Storage ์ ๊ธฐ์ค๊ฐ์ผ๋ก ์ฌ์ฉ๋๋ค.
Source. TCG TPM 2.0 Library Specification.
Related. TPM, Measured Boot, Attestation, Extend operation.
See also. Module 02
BL31 (TF-A Boot Loader stage 3-1)¶
Definition. ARM Trusted Firmware-A ์์ EL3 ์ ์์ฃผํ๋ Secure Monitor ๋จ๊ณ๋ก, BL2 ๊ฐ ๋ก๋ํ ํ ๋ถํ ์ข ๋ฃ ์์ ๊น์ง SMC ํธ๋ค๋ง๊ณผ Power State Coordination(PSCI) ์ ๋ด๋นํ๋ค.
Source. ARM Trusted Firmware-A documentation.
Related. Secure Monitor, BL2, BL33, PSCI, SMC.
See also. Module 02
BL33 (TF-A Boot Loader stage 3-3)¶
Definition. TF-A ์์ BL31 ๋ค์์ผ๋ก ์คํ๋๋ Non-secure bootloader ๋จ๊ณ๋ก, ์ผ๋ฐ์ ์ผ๋ก U-Boot / EDK2 ๊ฐ ์์นํ์ฌ OS loader ๊น์ง ์ธ๊ณํ๋ค.
Source. ARM Trusted Firmware-A documentation.
Related. U-Boot, EDK2, BL31, BL32, OS loader.
See also. Module 02
TPM (Trusted Platform Module)¶
Definition. TCG ํ์ค์ด ์ ์ํ ๋ณด์ ์ฝํ๋ก์ธ์ / ํ์จ์ด๋ก, ํค ๋ณด๊ดยท์๋ช ยทattestationยทPCR-based measured boot ๋ฅผ ์ ๊ณตํ๋ค.
Source. TCG TPM 2.0 Library Specification.
Related. PCR, Attestation, Sealed Storage.
See also. Module 02
NIST FIPS ์๋ฆฌ์ฆ (203 / 204 / 205)¶
Definition. NIST ๊ฐ ์ ์ ํ PQC ํ์ค โ FIPS 203 ML-KEM (key encapsulation), FIPS 204 ML-DSA (signature, lattice), FIPS 205 SLH-DSA (signature, hash-based).
Source. NIST FIPS 203, 204, 205 (2024).
Related. ML-KEM, ML-DSA, SLH-DSA, PQC.
See also. Module 03
BL32 (Trusted OS, e.g. OP-TEE)¶
Definition. TF-A ์ Secure World OS ๋จ๊ณ๋ก, BL31 ์ด ์ง์ ์ ์ ํธ์ถํ๋ฉด EL1S ์์ Trusted Application ์ ํธ์คํ ํ๋ค (๋ํ ๊ตฌํ: OP-TEE).
Source. ARM Trusted Firmware-A documentation; OP-TEE documentation.
Related. OP-TEE, S-EL1, BL31, TEE.
See also. Module 02
NS bit (Non-Secure Bit, TrustZone)¶
Definition. ARM TrustZone ์ ํต์ฌ ๋นํธ๋ก, AXI / AHB transaction ์ ๋ณด์ ๋๋ฉ์ธ (Secure / Non-Secure) ์ ํํํ๋ฉฐ TZ aware peripheral ์ ์ ๊ทผ ๊ถํ ๊ฒฐ์ ์ ์ฌ์ฉ๋๋ค.
Source. ARM TrustZone Architecture; AMBA NSAID extension.
Related. TrustZone, S/NS, NSAID.
See also. Module 02